<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.14"/>
<meta name="viewport" content="width=device-width, initial-scale=1"/>
<title>dptxss: XDpTxSs_Config Struct Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtreedata.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
  <td id="projectalign" style="padding-left: 0.5em;">
   <div id="projectname">dptxss
   </div>
   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.14 -->
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
$(function() {
  initMenu('',false,false,'search.php','Search');
});
</script>
<div id="main-nav"></div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('struct_x_dp_tx_ss___config.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#pub-attribs">Data Fields</a>  </div>
  <div class="headertitle">
<div class="title">XDpTxSs_Config Struct Reference<div class="ingroups"><a class="el" href="group__dptxss__v4__1.html">Dptxss_v4_1</a></div></div>  </div>
</div><!--header-->
<div class="contents">

<p>This typedef contains configuration information for the DisplayPort Transmitter Subsystem core.  
 <a href="struct_x_dp_tx_ss___config.html#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a726aa4b7853dd91b47e06cc0b341cea2"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#a726aa4b7853dd91b47e06cc0b341cea2">DeviceId</a></td></tr>
<tr class="memdesc:a726aa4b7853dd91b47e06cc0b341cea2"><td class="mdescLeft">&#160;</td><td class="mdescRight">DeviceId is the unique ID of the DisplayPort TX Subsystem core.  <a href="#a726aa4b7853dd91b47e06cc0b341cea2">More...</a><br /></td></tr>
<tr class="separator:a726aa4b7853dd91b47e06cc0b341cea2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aee6c9866e032c7e70e399bc0dac84aa6"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#aee6c9866e032c7e70e399bc0dac84aa6">BaseAddress</a></td></tr>
<tr class="memdesc:aee6c9866e032c7e70e399bc0dac84aa6"><td class="mdescLeft">&#160;</td><td class="mdescRight">BaseAddress is the physical base address of the core's registers.  <a href="#aee6c9866e032c7e70e399bc0dac84aa6">More...</a><br /></td></tr>
<tr class="separator:aee6c9866e032c7e70e399bc0dac84aa6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a06e7e174ee5641a92264d1b9d1c32385"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#a06e7e174ee5641a92264d1b9d1c32385">SecondaryChEn</a></td></tr>
<tr class="memdesc:a06e7e174ee5641a92264d1b9d1c32385"><td class="mdescLeft">&#160;</td><td class="mdescRight">This Subsystem core supports audio packets being sent by the secondary channel.  <a href="#a06e7e174ee5641a92264d1b9d1c32385">More...</a><br /></td></tr>
<tr class="separator:a06e7e174ee5641a92264d1b9d1c32385"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aed67743dbd5cfc7d788f6ebf875146e0"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#aed67743dbd5cfc7d788f6ebf875146e0">MaxBpc</a></td></tr>
<tr class="memdesc:aed67743dbd5cfc7d788f6ebf875146e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">The maximum bits/color supported by this Subsystem core.  <a href="#aed67743dbd5cfc7d788f6ebf875146e0">More...</a><br /></td></tr>
<tr class="separator:aed67743dbd5cfc7d788f6ebf875146e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6e771d00e3888fe140b0b4ab162c8ae3"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#a6e771d00e3888fe140b0b4ab162c8ae3">HdcpEnable</a></td></tr>
<tr class="memdesc:a6e771d00e3888fe140b0b4ab162c8ae3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This Subsystem core supports digital content protection.  <a href="#a6e771d00e3888fe140b0b4ab162c8ae3">More...</a><br /></td></tr>
<tr class="separator:a6e771d00e3888fe140b0b4ab162c8ae3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a76c53ab2a931220726a76cb0fc26e909"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#a76c53ab2a931220726a76cb0fc26e909">MaxLaneCount</a></td></tr>
<tr class="memdesc:a76c53ab2a931220726a76cb0fc26e909"><td class="mdescLeft">&#160;</td><td class="mdescRight">The maximum lane count supported by this core instance.  <a href="#a76c53ab2a931220726a76cb0fc26e909">More...</a><br /></td></tr>
<tr class="separator:a76c53ab2a931220726a76cb0fc26e909"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abbbf67cd9c07fcd8b130f1ef48b514cb"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#abbbf67cd9c07fcd8b130f1ef48b514cb">MstSupport</a></td></tr>
<tr class="memdesc:abbbf67cd9c07fcd8b130f1ef48b514cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multi-stream transport (MST) mode is enabled by this core instance.  <a href="#abbbf67cd9c07fcd8b130f1ef48b514cb">More...</a><br /></td></tr>
<tr class="separator:abbbf67cd9c07fcd8b130f1ef48b514cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5aef6d6aaba4af4cce6b1fd39a64d8ad"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#a5aef6d6aaba4af4cce6b1fd39a64d8ad">NumMstStreams</a></td></tr>
<tr class="memdesc:a5aef6d6aaba4af4cce6b1fd39a64d8ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">The total number of MST streams supported by this core instance.  <a href="#a5aef6d6aaba4af4cce6b1fd39a64d8ad">More...</a><br /></td></tr>
<tr class="separator:a5aef6d6aaba4af4cce6b1fd39a64d8ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abe63ec9d971507c261ee11161217c311"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dp_tx_ss___dp_sub_core.html">XDpTxSs_DpSubCore</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#abe63ec9d971507c261ee11161217c311">DpSubCore</a></td></tr>
<tr class="memdesc:abe63ec9d971507c261ee11161217c311"><td class="mdescLeft">&#160;</td><td class="mdescRight">DisplayPort Configuration.  <a href="#abe63ec9d971507c261ee11161217c311">More...</a><br /></td></tr>
<tr class="separator:abe63ec9d971507c261ee11161217c311"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a20c596117541cebd5edd537ceba043d0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dp_tx_ss___vtc_sub_core.html">XDpTxSs_VtcSubCore</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dp_tx_ss___config.html#a20c596117541cebd5edd537ceba043d0">VtcSubCore</a> [<a class="el" href="group__dptxss__v4__1.html#ga825f1c8ab7d030cf6903152c5dcf5878">XDPTXSS_NUM_STREAMS</a>]</td></tr>
<tr class="memdesc:a20c596117541cebd5edd537ceba043d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">VTC Configura- tion.  <a href="#a20c596117541cebd5edd537ceba043d0">More...</a><br /></td></tr>
<tr class="separator:a20c596117541cebd5edd537ceba043d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This typedef contains configuration information for the DisplayPort Transmitter Subsystem core. </p>
<p>Each DisplayPort TX Subsystem core should have a configuration structure associated. </p>
</div><h2 class="groupheader">Field Documentation</h2>
<a id="aee6c9866e032c7e70e399bc0dac84aa6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aee6c9866e032c7e70e399bc0dac84aa6">&#9670;&nbsp;</a></span>BaseAddress</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">UINTPTR XDpTxSs_Config::BaseAddress</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>BaseAddress is the physical base address of the core's registers. </p>

<p class="reference">Referenced by <a class="el" href="xdptxss__debug__example_8c.html#a2f0f6102e3569d780558919b555e169f">DpTxSs_DebugExample()</a>, <a class="el" href="xdptxss__hdcp__example_8c.html#a88743150e5b069be61f448bab57a51cd">DpTxSs_HdcpExample()</a>, <a class="el" href="xdptxss__intr__example_8c.html#a33cda38a440b9d58b40394074c0587ec">DpTxSs_IntrExample()</a>, <a class="el" href="xdptxss__mst__example_8c.html#a522279e148197f834dbdd2eaaf8220e3">DpTxSs_MstExample()</a>, <a class="el" href="xdptxss__selftest__example_8c.html#adc0da41ea69de74b4a2f24eb6d2580b7">DpTxSs_SelfTestExample()</a>, and <a class="el" href="group__dptxss__v4__1.html#gafb7b3b467a12177fb0c8053f4b7d70a1">XDpTxSs_CfgInitialize()</a>.</p>

</div>
</div>
<a id="a726aa4b7853dd91b47e06cc0b341cea2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a726aa4b7853dd91b47e06cc0b341cea2">&#9670;&nbsp;</a></span>DeviceId</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u16 XDpTxSs_Config::DeviceId</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DeviceId is the unique ID of the DisplayPort TX Subsystem core. </p>

</div>
</div>
<a id="abe63ec9d971507c261ee11161217c311"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abe63ec9d971507c261ee11161217c311">&#9670;&nbsp;</a></span>DpSubCore</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_dp_tx_ss___dp_sub_core.html">XDpTxSs_DpSubCore</a> XDpTxSs_Config::DpSubCore</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DisplayPort Configuration. </p>

<p class="reference">Referenced by <a class="el" href="group__dptxss__v4__1.html#ga2d3af2f5793e806f2e63a39d1055568c">XDpTxSs_Reset()</a>.</p>

</div>
</div>
<a id="a6e771d00e3888fe140b0b4ab162c8ae3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6e771d00e3888fe140b0b4ab162c8ae3">&#9670;&nbsp;</a></span>HdcpEnable</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XDpTxSs_Config::HdcpEnable</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This Subsystem core supports digital content protection. </p>

<p class="reference">Referenced by <a class="el" href="group__dptxss__v4__1.html#gae497d800a09c0f6c8d443cd17e444f47">XDpTxSs_ReportCoreInfo()</a>, <a class="el" href="group__dptxss__v4__1.html#gadba9a0b5fa0a01037963ebc444d37407">XDpTxSs_SelfTest()</a>, and <a class="el" href="group__dptxss__v4__1.html#ga1e195acb70afeb93d39f9e487e137356">XDpTxSs_SetHasRedriverInPath()</a>.</p>

</div>
</div>
<a id="aed67743dbd5cfc7d788f6ebf875146e0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aed67743dbd5cfc7d788f6ebf875146e0">&#9670;&nbsp;</a></span>MaxBpc</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XDpTxSs_Config::MaxBpc</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The maximum bits/color supported by this Subsystem core. </p>

<p class="reference">Referenced by <a class="el" href="group__dptxss__v4__1.html#gae497d800a09c0f6c8d443cd17e444f47">XDpTxSs_ReportCoreInfo()</a>.</p>

</div>
</div>
<a id="a76c53ab2a931220726a76cb0fc26e909"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a76c53ab2a931220726a76cb0fc26e909">&#9670;&nbsp;</a></span>MaxLaneCount</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XDpTxSs_Config::MaxLaneCount</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The maximum lane count supported by this core instance. </p>

<p class="reference">Referenced by <a class="el" href="group__dptxss__v4__1.html#gae497d800a09c0f6c8d443cd17e444f47">XDpTxSs_ReportCoreInfo()</a>.</p>

</div>
</div>
<a id="abbbf67cd9c07fcd8b130f1ef48b514cb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abbbf67cd9c07fcd8b130f1ef48b514cb">&#9670;&nbsp;</a></span>MstSupport</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XDpTxSs_Config::MstSupport</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Multi-stream transport (MST) mode is enabled by this core instance. </p>

<p class="reference">Referenced by <a class="el" href="xdptxss__intr__example_8c.html#a43bfef1afb72a74517979ca8d98b62c3">DpTxSs_HpdEventHandler()</a>, and <a class="el" href="group__dptxss__v4__1.html#gae497d800a09c0f6c8d443cd17e444f47">XDpTxSs_ReportCoreInfo()</a>.</p>

</div>
</div>
<a id="a5aef6d6aaba4af4cce6b1fd39a64d8ad"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5aef6d6aaba4af4cce6b1fd39a64d8ad">&#9670;&nbsp;</a></span>NumMstStreams</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XDpTxSs_Config::NumMstStreams</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The total number of MST streams supported by this core instance. </p>

<p class="reference">Referenced by <a class="el" href="group__dptxss__v4__1.html#gae497d800a09c0f6c8d443cd17e444f47">XDpTxSs_ReportCoreInfo()</a>, <a class="el" href="group__dptxss__v4__1.html#ga2d3af2f5793e806f2e63a39d1055568c">XDpTxSs_Reset()</a>, <a class="el" href="group__dptxss__v4__1.html#gadba9a0b5fa0a01037963ebc444d37407">XDpTxSs_SelfTest()</a>, and <a class="el" href="group__dptxss__v4__1.html#gaf70f2f11d0e48e80c92673f3e208fc23">XDpTxSs_Stop()</a>.</p>

</div>
</div>
<a id="a06e7e174ee5641a92264d1b9d1c32385"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a06e7e174ee5641a92264d1b9d1c32385">&#9670;&nbsp;</a></span>SecondaryChEn</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u8 XDpTxSs_Config::SecondaryChEn</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This Subsystem core supports audio packets being sent by the secondary channel. </p>

<p class="reference">Referenced by <a class="el" href="group__dptxss__v4__1.html#gae497d800a09c0f6c8d443cd17e444f47">XDpTxSs_ReportCoreInfo()</a>.</p>

</div>
</div>
<a id="a20c596117541cebd5edd537ceba043d0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a20c596117541cebd5edd537ceba043d0">&#9670;&nbsp;</a></span>VtcSubCore</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname"><a class="el" href="struct_x_dp_tx_ss___vtc_sub_core.html">XDpTxSs_VtcSubCore</a> XDpTxSs_Config::VtcSubCore[<a class="el" href="group__dptxss__v4__1.html#ga825f1c8ab7d030cf6903152c5dcf5878">XDPTXSS_NUM_STREAMS</a>]</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>VTC Configura- tion. </p>

</div>
</div>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
  <ul>
    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
  </ul>
</div>
</body>
</html>
